CVE-2025-35979
NoneCVSS
—
EPSS
0.1%
Published
May 12, 2026
CISA due date
—
The record
Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel(R) Processors within VMX non-root (guest) operation may allow an information disclosure. Unprivileged software adversary with an authenticated user combined with a high complexity attack may enable data exposure. This result may potentially occur via local access when attack requirements are present without special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (high), integrity (none) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (high), integrity (none) and availability (none) impacts.
Affected packages
| Ecosystem | Package | Introduced | Fixed |
|---|---|---|---|
| openSUSE:Tumbleweed | ucode-intel | 0 | 20260512-1.1 |
Related vulnerabilities
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- CVE-2024-23984 Observable discrepancy in RAPL interface for some Intel(R) Processors may allow a… Also affects ucode-intel
- CVE-2024-25939 Mirrored regions with different values in 3rd Generation Intel(R) Xeon(R) Scalable… Also affects ucode-intel
- CVE-2024-24980 Protection mechanism failure in some 3rd, 4th, and 5th Generation Intel(R) Xeon(R)… Also affects ucode-intel