CVE-2026-99017
High · 7.0CVSS
7.0
EPSS
0.2%
Published
Oct 23, 2026
CISA due date
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Cloudanix analysis
A configuration mistake in the Linux kernel can leave certain RISC-V chips without a needed safety fix, so the system thinks it is protected when it is not.
- Exploitation
- Local Privilege
- Attacker needs
- Low Privilege
- Complexity
- High
- Impact
- Full Compromise
- Component
- OS kernel
- Class
- Misconfiguration
- Remediation
- Upgrade
- Effort
- Medium
- Patch risk
- Low
What it actually does
Kernel configuration dependency error prevents RISCV_ALTERNATIVE_EARLY from being enabled when ERRATA_THEAD_GHOSTWRITE is selected without ERRATA_THEAD_MAE, so errata_probe_ghostwrite never runs at the required early boot stage, ghostwrite_state is never marked VULNERABLE, ghostwrite_enable_mitigation returns false, xtheadvector remains enabled, and the CPU is incorrectly reported as not affected.
Why it matters to the business
RISC-V systems using T-Head C9xx CPUs may ship or boot with an incomplete kernel that silently leaves a hardware vulnerability unmitigated, increasing exposure on recently built kernels despite the errata option being turned on.
How an attack unfolds
An attacker with local access on an affected T-Head system benefits from the missing early-boot mitigation; because ghostwrite_state remains unset, the kernel does not disable the vulnerable xtheadvector extension, allowing subsequent local exploitation of the underlying Ghostwrite hardware issue.
How to fix it
Rebuild the kernel ensuring ERRATA_THEAD_GHOSTWRITE selects RISCV_ALTERNATIVE_EARLY; enable both errata options together, apply the resulting kernel, and verify the early boot stage now correctly marks vulnerable state and applies mitigation.
How to confirm the fix worked
After the corrected kernel boots, confirm CONFIG_RISCV_ALTERNATIVE_EARLY is present, check that ghostwrite_state is recorded as VULNERABLE on affected hardware, verify xtheadvector is disabled by the mitigation, and confirm sysfs reports the proper affected status.
Typical attack path
- Build or obtain a kernel with ERRATA_THEAD_GHOSTWRITE=y but ERRATA_THEAD_MAE=n
- Boot on T-Head C9xx hardware so early alternatives never execute
- Observe sysfs reporting 'Not affected' and xtheadvector still enabled
- Execute local code that relies on the unmitigated Ghostwrite behavior
How to detect it
Inspect kernel build configuration for the presence of both ERRATA_THEAD_GHOSTWRITE and RISCV_ALTERNATIVE_EARLY; on running systems examine sysfs cpu vulnerability files and dmesg for ghostwrite_state and mitigation status on T-Head hardware.
What your security team should do
- Prioritize rebuild of any RISC-V kernels that enable ERRATA_THEAD_GHOSTWRITE without ERRATA_THEAD_MAE
- Add build-time checks or Kconfig warnings to enforce the early-alternatives dependency for Ghostwrite errata
- Audit recently deployed T-Head-based systems for incorrect 'Not affected' status in sysfs
The record
In the Linux kernel, the following vulnerability has been resolved: riscv: errata: select RISCV_ALTERNATIVE_EARLY for THEAD GHOSTWRITE errata_probe_ghostwrite() only marks the CPU as vulnerable when it is called at the RISCV_ALTERNATIVES_EARLY_BOOT stage, and the mitigation in ghostwrite_enable_mitigation() only takes effect if the vulnerable state was recorded before the boot alternatives are patched. The early boot stage is only executed when CONFIG_RISCV_ALTERNATIVE_EARLY is enabled, which currently is only selected by ERRATA_THEAD_MAE. In a kernel built with ERRATA_THEAD_GHOSTWRITE=y but ERRATA_THEAD_MAE=n, the early alternatives never run, so ghostwrite_state is never set to VULNERABLE: ghostwrite_enable_mitigation() returns false, xtheadvector remains enabled, and sysfs reports "Not affected" on a vulnerable T-Head C9xx CPU. Select RISCV_ALTERNATIVE_EARLY from ERRATA_THEAD_GHOSTWRITE so that the vulnerability is detected in the early boot stage and the default mitigation is applied.
Affected packages
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