CVE-2026-23116
Medium · 5.5CVSS
5.5
EPSS
0.1%
Published
Feb 14, 2026
CISA due date
—
Cloudanix analysis
On certain hardware, a local user could freeze the entire computer by interacting with video processing components, forcing a restart to recover.
- Exploitation
- Local Privilege
- Attacker needs
- Low Privilege
- Complexity
- Low
- Impact
- Denial Of Service
- Component
- OS kernel
- Class
- Other
- Remediation
- Upgrade
- Effort
- Medium
- Patch risk
- Medium
What it actually does
The flaw permits a local process to trigger separate reset or clock operations on G1/G2 VPU units of the i.MX8MQ VPUMIX domain; because the ADB lacks independent rst/clk bits, these operations cause the domain to hang.
Why it matters to the business
Systems using the i.MX8MQ SoC can experience complete unresponsiveness requiring a power cycle, interrupting workloads and availability on affected embedded or edge Linux devices.
How an attack unfolds
An attacker with local access invokes the VPU power notifier or blk-ctrl operations that attempt independent G1 or G2 reset/clock gating; the hardware cannot satisfy the request, resulting in a domain-level hang.
How to fix it
Upgrade the Linux kernel to a revision containing commit 8859e336d233e61a4c40d40dc6a9f21e8b9b719c, which removes the separate rst_mask and clk_mask fields from imx8mq_vpu_blk_ctl_domain_data and lets the power notifier perform the combined reset.
How to confirm the fix worked
Confirm the running kernel tree contains commit 8859e336d233e61a4c40d40dc6a9f21e8b9b719c; inspect the imx8m-blk-ctrl driver to verify absence of rst_mask/clk_mask for the 8mq VPU domain and that imx8mq_vpu_power_notifier performs the reset.
Typical attack path
- Obtain a local shell or process on an i.MX8MQ Linux system
- Trigger VPU power-domain or blk-ctrl reset paths
- Request separate reset or clock mask operations for G1 or G2
- Induce system-wide hang
How to detect it
Review kernel logs for imx8m-blk-ctrl or VPU power-domain errors preceding a hang; examine dmesg or journalctl for references to separate VPU reset attempts on i.MX8MQ platforms.
What your security team should do
- Apply the referenced kernel commit on all i.MX8MQ deployments
- Reboot affected systems after the update
- Monitor vendor stable branches for back-ports
The record
In the Linux kernel, the following vulnerability has been resolved: pmdomain: imx8m-blk-ctrl: Remove separate rst and clk mask for 8mq vpu For i.MX8MQ platform, the ADB in the VPUMIX domain has no separate reset and clock enable bits, but is ungated and reset together with the VPUs. So we can't reset G1 or G2 separately, it may led to the system hang. Remove rst_mask and clk_mask of imx8mq_vpu_blk_ctl_domain_data. Let imx8mq_vpu_power_notifier() do really vpu reset.
Affected packages
| Ecosystem | Package | Introduced | Fixed |
|---|---|---|---|
| Linux | Kernel | 5.18.0 | 6.1.162 |
| openSUSE:Leap 16.0 | dtb-aarch64 | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-64kb | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-azure | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-default | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-default-base | 0 | 6.12.0-160000.27.1.160000.2.8 |
| openSUSE:Leap 16.0 | kernel-docs | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-kvmsmall | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-obs-build | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-obs-qa | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-rt | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-source | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-syms | 0 | 6.12.0-160000.27.1 |
| openSUSE:Leap 16.0 | kernel-zfcpdump | 0 | 6.12.0-160000.27.1 |
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