Cloudanix VulnDB

CVE-2023-53780

None

CVSS

—

EPSS

0.2%

Published

Dec 9, 2025

CISA due date

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Cloudanix analysis

Schedule a fix SSVC: Track

A graphics power setting calculation error could cause display problems on some computers until the software is updated.

Exploitation
Local Privilege
Attacker needs
Local User
Complexity
Theoretical
Impact
Other
Component
OS kernel
Class
Other
Remediation
Upgrade
Effort
Medium
Patch risk
Low

What it actually does

Incorrect FCLK p-state change watermark calculation using dummy latency values when UCLK p-state is unsupported, leading to potential underflow conditions in the display driver.

Why it matters to the business

Display instability or degraded graphics performance on affected systems until updated, with low overall risk given limited exploitability.

How an attack unfolds

An attacker with local access could attempt to manipulate power state transitions to trigger the underflow condition in the AMD display driver; no known remote or in-the-wild exploitation exists.

How to fix it

Update to fixed kernel versions that calculate FCLK watermark based on actual FCLK p-state latency; for listed packages apply the referenced fixed versions such as 2.20.1-0ubuntu0.16.04.1 or 2.20.0-2.

How to confirm the fix worked

Confirm kernel or package version matches a fixed release and verify watermark calculation logic uses FCLK latency when UCLK p-state is unsupported.

Typical attack path

  1. Obtain local access to a vulnerable system
  2. Trigger graphics power state transitions under unsupported UCLK conditions
  3. Observe or induce display driver underflow

How to detect it

Review system logs for display driver errors or underflow warnings around power state changes; no specific exploitation artifacts known.

What your security team should do

  • Apply available kernel or package updates immediately
  • Prioritize systems with AMD display hardware
  • Monitor for any display-related stability issues post-update

The record

In the Linux kernel, the following vulnerability has been resolved: drm/amd/display: fix FCLK pstate change underflow [Why] Currently we set FCLK p-state change watermark calculated based on dummy p-state latency when UCLK p-state is not supported [How] Calculate FCLK p-state change watermark based on on FCLK pstate change latency in case UCLK p-state is not supported

Affected packages

Ecosystem Package Introduced Fixed
Linux Kernel 0 6.1.16
Linux Kernel 4.15.0 6.1.16
SUSE:Linux Enterprise Micro 5.5 kernel-rt 0 5.14.21-150500.13.118.1
SUSE:Linux Enterprise Micro 5.5 kernel-source-rt 0 5.14.21-150500.13.118.1

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