CVE-2023-31316
NoneCVSS
—
EPSS
0.1%
Published
May 15, 2026
CISA due date
—
The record
Improperly preserved integrity of hardware configuration state during a power save/restore operation in the AMD Secure Processor (ASP) could allow an attacker with the ability to write outside the trusted memory range (TMR) to change the execution flow of the Video Core Next (VCN) firmware potentially impacting confidentiality, integrity, or availability.
Affected packages
| Ecosystem | Package | Introduced | Fixed |
|---|